Adapting Static Single Assignment for Hardware Compilation

This paper describes methods for synthesizing the internal representation of a compiler into a hardware description language; a process often referred to as hardware compilation. We present a framework for this transformation including methods to control the path of execution and ways to deal with the data communication. We show how static single assignment (SSA) is useful to reduce the amount of data communication in the hardware. In some applications, SSA reduces the data communication by 70 fold. We demonstrate that the placement of Φ-nodes by current SSA algorithms is not optimal in terms of minimizing data communication. We develop a new SSA algorithm for Φ-node placement that considers data communication. We show that our algorithm reduces the data communication for some applications as much as 20% as compared to the best-known SSA algorithm – the pruned algorithm.